Some processors such as CPUs (Central Processing Unit) are capable of executing the same type of calculation on different data in parallel by one instruction referred to as an “SIMD (Single Instruction Multiple Data) instruction”. Such a processor which executes the SIMD instruction includes a register referred to as an “SIMD register” which stores different data to be processed in parallel in combination. It is assumed that data A1 and data A2 are stored in an SIMD register s1, data B1 and data B2 are stored in an SIMD register s2, and an SIMD instruction representing “s1+s2” is input to a processor. In this case, the processor performs two additions “A1+B1” and “A2+B2” in parallel by one instruction.
In general, as a method for generating a code including an SIMD instruction, two or more instructions which have the same calculation type and which may be executed in parallel are retrieved from among a plurality of instructions which are not SIMD instructions and the retrieved instructions are combined with each other to generate an SIMD instruction. For example, some compilers which convert source codes described by a high-level language into machine-readable object codes convert two or more instructions into an SIMD instruction by combining the two or more instructions in an optimization process. The number of instructions which can be combined with each other (parallel degree) depends on architecture of a processor.
Note that a program processing method for converting a source code into an intermediate code described by an RTL (Register Transfer Language), extracting an instruction set of different data in which the same calculation type is employed from the intermediate code, and converting the instruction set into an SIMD instruction has been proposed. Furthermore, a computer system which generates a trace dependency tree representing the dependency relationship among a plurality of instructions, retrieves two or more instructions which employ the same calculation type and which belong to the same level from the trace dependency tree, and merges the retrieved instructions into a single SIMD instruction has been proposed.
Japanese Laid-open Patent Publication No. 2003-202991 and International Publication Pamphlet No. WO 2006/007193 disclose related techniques.